LV23000M read es write fuggvenyek : 

// a Kiolvaso fuggveny ,kiolvassa az LV23000M tartalmat

unsigned short Read_From_SPI(unsigned short spi_addr , unsigned short num_of_bytes , unsigned short* puffer)
{
    
   
   
    unsigned short addr_swap_high = 0;
    unsigned short addr_swap_low = 0;
    unsigned short work_swap = 0;
   
    unsigned short spi_read_clock  = 0;
    unsigned short shift_bit = 0;
    unsigned short read_stat = 1;  // this is return value of prescaler
    unsigned short readed_prescaler_low = 0;
    unsigned short readed_prescaler_high = 0;

    unsigned short i = 0;
    unsigned short shift_in = 0;
    unsigned short spi_clock_1 = 0;
    unsigned short send_rd = 0;
    

      work_swap = spi_addr;
      work_swap = work_swap & 0xF0;
      work_swap = work_swap >> 4;

      addr_swap_high = work_swap;

      work_swap = 0;

      work_swap = spi_addr ;
      work_swap = work_swap & 0x0F;
      work_swap = work_swap << 4;

      addr_swap_low = work_swap;
      work_swap = 0;

     
      shift_bit = addr_swap_low | addr_swap_high ;
     

    
    LATC.RC3 = 0; // SCK LOW
    Delay_us(5);
    LATC.RC2 = 0; // CS LOW State

    Delay_us(5);
    
      send_rd = shift_bit;
    
    for(spi_read_clock = 0; spi_read_clock  < 16 ; spi_read_clock++)
    {

       if(spi_read_clock % 2 == 0)
       {

          send_rd = shift_bit & 0x80;
          if(send_rd == 0x80) LATC.RC5 = 1;  // RC5 SDO
          if(send_rd != 0x80) LATC.RC5 = 0;  // RC5 SDO
          Delay_us(50);
          LATC.RC3 = 1; //SCLK
       }
       else
       {
          Delay_us(50);
          LATC.RC3 = 0;
          shift_bit = shift_bit << 1;

       }



    }
    
    LATC.RC3 = 0 ; // SCK IDLE Stata LOW
    
    Delay_us(5);
    
    LATC.RC5 = 0 ; // SDO IDLE State LOW
    
   Delay_us(5);
    
    LATC.RC2 = 1;  // CE  HIGH
    
    Delay_us(5);
    
    send_rd = 0;
    
    for(i = 0; i < num_of_bytes ; i++)
    {
      shift_in = 0;
      
      for(spi_read_clock = 0 ; spi_read_clock < 16 ; spi_read_clock++)
      {
    
        if(spi_read_clock % 2 == 0)
        {
             
             LATC.RC3 = 0;
             shift_in = shift_in | PORTC.RC4 ;
             Delay_us(50);
        
        
        }
        else
        {
           
            LATC.RC3 = 1;
            shift_in = shift_in << 1;
            Delay_us(50);
        
        }

      }
    
       puffer[i] = shift_in;
    
    }
   
    LATC.RC3 = 0; // SCLK IDLE State LOW
    
    Delay_us(5);
    
    LATC.RC5 = 0; // SDO IDLE state  LOW
   
    Delay_us(5);
   
    LATC.RC2 = 0; // CE LOW

    
    return read_stat;
}



// Az LV23000M irasra , write fuggveny : 

unsigned short Write_To_SPI(unsigned short spi_wr_addr , unsigned short num_of_wr_bytes , unsigned short* wr_puffer)
{
    
    
    unsigned short spi_clock = 0;
    unsigned short addr_swap_high = 0;
    unsigned short addr_swap_low = 0;
    unsigned short work_swap = 0;
    unsigned shift_bit = 0;
    
    unsigned short send_val = 0;
    
    unsigned short byte_counter = 0;

      work_swap = spi_wr_addr;
      work_swap = work_swap & 0xF0;
      work_swap = work_swap >> 4;
      
      addr_swap_high = work_swap;
      
      work_swap = 0;
     
      work_swap = spi_wr_addr ;
      work_swap = work_swap & 0x0F;
      work_swap = work_swap << 4;
     
      addr_swap_low = work_swap;
      work_swap = 0;
     
     
     shift_bit = addr_swap_low | addr_swap_high;


    
    // CS set to  LOW
    LATC.RC2 = 0;
    //Delay_us(5);
    
    for(spi_clock = 0; spi_clock  < 16 ; spi_clock++)
    {
    
       if(spi_clock % 2 == 0)
       {

         
          send_val = shift_bit & 0x80;
          if(send_val == 0x80) LATC.RC5 = 1;
          if(send_val != 0x80) LATC.RC5 = 0;
          
          Delay_us(50);
         
          LATC.RC3 = 1;

       }
       else
       {
          
          Delay_us(50);
           LATC.RC3 = 0;
          shift_bit = shift_bit << 1;
          

       }
    

    
    }
    
    LATC.RC3 = 0 ; // SCLK IDLE State LOW
   
    //Delay_us(5);
    
    LATC.RC5 = 0;  // SDO IDLE State LOW
  
    //Delay_us(5);
    
    LATC.RC2 = 1; // CS HiGH State
   
    //Delay_us(5);
    
    
    send_val = 0;
    
    
    for(byte_counter = num_of_wr_bytes ;  byte_counter > 0 ; byte_counter--)
    {
    
      
       send_val = wr_puffer[byte_counter];
      
       for(spi_clock = 0; spi_clock  < 16 ; spi_clock++)
       {

         if(spi_clock % 2 == 0)
         {
            
            send_val = send_val & 0x80;
            if(send_val == 0x80) LATC.RC5 = 1;
            if(send_val != 0x80) LATC.RC5 = 0;
            Delay_us(50);
            
            LATC.RC3 = 1;
        
        }
        else
        {
           
           Delay_us(50);
           send_val = send_val << 1;
           LATC.RC3 = 0;
        }

       }
    
    
    
    }
    
    LATC.RC3 = 0; // SCLK IDLE State  LOW
    
    //Delay_us(5);
    
    LATC.RC5 = 0; // SDO IDLE State   LOW
   
   // Delay_us(5);
    
    LATC.RC2 = 0; // CE LOW
    
    shift_bit = 1;
    
    return shift_bit;


}